Means are already known for overcoming the limitations in regard to standard MOS technologies, in particular for compensating for the relatively high level of the input drift voltage of amplifier circuits. The basic principle comprises using a MOS capacitor to store the input drift voltage, and making use of the parameter which is stored in that fashion to correct the information supplied by the amplifier. A first example of use of that principle may be found in the article by Yen S. Yee et al entitled "A 1 mV MOS Comparator", which appeared in the IEEE Journal of Solid-State Circuits, Vol. SC-13, No. 3, June 1978, pages 294-297. A basic circuit diagram of the circuit described in that article is shown in FIG. 1. The input of the amplifier 1 is connected to the input terminal 2 by way of a change-over switch 3 and a capacitor 4, and to the output terminal 5 by way of an on-off switch 6. That circuit operates in two phases. During the memorization or storage phase, the amplifier is connected in a unit gain loop mode by closure of the switch 6 and the change-over switch 3 connects a terminal of the capacitor 4 to earth. In the equilibrium condition, the input drift voltage which appears at the input node 7 of the amplifier is then stored in the capacitor 4. During the amplification phase, the switch 6 is open and the input 2 is connected to the capacitor 4 by way of the switch 3, the voltage stored in the capacitor 4 serving to compensate for the effect of the input drift voltage of the amplifier 1. The major disadvantage of such a compensating method lies in the fact that the on-off switches are formed by means of MOS transistors. Thus, when the transistor which forms the switch 6 is in a non-conducting condition, a part of the channel charge is re-injected at the node 7, which modifies the voltage stored in the capacitor 4, and that modification may be of the same order of magnitude as the input drift voltage which is to be compensated.
A second example of use of the above-mentioned principle is set forth in the article by R. Poujois et al entitled "A Low Drift Fully Integrated MOS-FET Operational Amplifier" which appeared in the above-mentioned IEEE Journal, Vol. SC-13, No. 4, August 1978, pages 499-503. That article provides for the cascade connection of a plurality of amplifier stages coupled by capacitors for storing the value of the input drift voltage of the stage preceding same, multiplied by the gain of that stage. The efficiency of that method increases in proportion to an increasing number of stages, which in itself is a disadvantage. Moreover, it is difficult to ensure stability of an amplifier which is made up of a plurality of stages by means of a negative feedback effect without substantially reducing its band width. If such a method may be applied to the design of a comparator, it is in contrast difficult to apply it to the construction of an operational amplifier.
Thus, an object of the present invention is to provide an amplifier circuit which does not suffer from the above-mentioned disadvantages.
Another object of the invention is to provide an amplifier circuit which includes means for compensating for the input drift voltage.
Yet another object of the invention is to provide an amplifier circuit wherein the charge injection effect, which occurs when on-off switches are opened, is minimized.
The present invention will be better appreciated by means of the following description of particular embodiments, which is set forth purely by way of illustration and with reference to the accompanying drawings in which: